Pillar B · State as of 2026-08-29

What is a logical qubit, and why does the physical-to-logical ratio decide the timing?

A logical qubit is one dependable qubit assembled out of many unreliable physical ones through quantum error correction. The physical-to-logical ratio is the exchange rate that converts the qubit counts vendors announce into the logical qubits algorithms actually consume. Measured ratios in 2024–2025 run from 2:1 (Quantinuum Helios, at a state-prep benchmark) to 101:1 (Google Willow, one memory qubit); roadmaps assume 25:1 to 100:1 at far harder targets. A ratio quoted without its error target is a number without units. As of August 2026, no machine has run a useful end-to-end algorithm on logical qubits.
→ Leer en español
State as of: 2026-08-29

A physical qubit is a device. A logical qubit is a promise kept by many devices at once: one qubit of information spread across tens or hundreds of physical qubits so that when individual components fail — and they fail constantly — the encoded information survives. The number of physical qubits it takes to keep that promise, the physical-to-logical ratio, is the single number that converts the qubit counts on vendor roadmaps into the logical qubits algorithms actually consume. That division — not the headline qubit count — is what turns a roadmap into a date.

Status as of: August 29, 2026.

What is a logical qubit, exactly?

The best physical qubits still fail at rates useful algorithms cannot absorb. Quantinuum's Helios, the current fidelity leader among production machines, reports 99.921% two-qubit gate fidelity (release, Nov 5, 2025) — roughly one error every ≈1,300 two-qubit gates, by direct arithmetic. IBM's 2029 target is a machine that runs 100 million gates (IBM Quantum blog, Jun 10, 2025) — which, by the same arithmetic, needs error rates near one in 100 million per logical operation. The gap between those two numbers is about five orders of magnitude, and no amount of engineering polish on a single physical qubit is expected to close it.

Error correction closes it structurally instead of incrementally. You encode one logical qubit across many physical qubits, repeatedly measure "syndromes" — checks that reveal errors without reading the data — and decode and correct in real time. This is a different thing from error mitigation, which post-processes statistics on today's uncorrected machines and cannot arbitrarily suppress errors (see our error-mitigation explainer).

The reason the whole scheme is worth the overhead is an exchange rate measured in December 2024: Google's Willow chip showed that each time the code's distance grows by 2 — costing more physical qubits per logical — the logical error rate is divided by a factor Λ ≈ 2.14 (Nature 638, 920–926, 2024). Errors fall exponentially while the qubit bill grows only polynomially. Willow's demonstration used 101 physical qubits for 1 logical memory qubit at distance-7, reaching 0.143% error per cycle, with a logical lifetime 2.4× the best physical qubit on the chip. That is the entire bet of fault tolerance in one measurement — and it is also, at 101:1, a preview of the price.

Why the ratio is THE number in every roadmap

Roadmaps advertise physical qubits. Algorithms consume logical qubits at a target error rate. The ratio is the division between the two, and it moves the outcome more than the qubit count does.

SAME CHIP, TWO CODES ≈20,000 physical qubits (2029-class) ÷ ≈100 — qLDPC gross code = 200 logical qubits IBM Starling promise, 100M gates ÷ ≈1,000 — surface-code class = ≈20 logical qubits derived from IBM's own "10× fewer" the code — not the qubit count — sets what a date can promise

IBM's 2029 machine, Starling, is specified as ≈200 logical qubits on an estimated ≈20,000 physical qubits — a ratio near 100:1 — running 100 million gates (IBM Quantum blog, Jun 10, 2025). That ratio is only arithmetically possible because IBM switched from the surface code to a qLDPC "gross" code, [[144,12,12]], which stores 12 logical qubits in 288 physical qubits (24:1) and, per IBM's own paper, "corrects errors just as well as the surface code does, but requires 10× fewer qubits" (Bravyi et al., Nature 627, 2024). Run the division with a surface-code-class ratio — ≈1,000:1 at the same target, derived directly from that 10× — and the same 20,000 physical qubits yield ≈20 logical qubits, a different decade of capability from identical hardware. IonQ's 2030 target makes the same move with different numbers: 2 million physical qubits yielding 40,000–80,000 logical qubits assumes a ratio of 25:1 to 50:1 at a stated logical error target below 10⁻¹² (IonQ blog, Jun 13, 2025).

This is why the ratio, not the qubit count, is the number to watch in any roadmap — and why our timing guide reads vendor dates as targets whose feasibility hangs on unproven conversion factors.

Which ratios are measured, and which are projections?

System Ratio What "logical" means there Status Source
Microsoft + Quantinuum H2 (Sep 2024) ≈4.7:1 (12 from 56) 12 entangled logical qubits; circuit error 22× below physical Measured Azure Quantum blog, Sep 10, 2024
Google Willow (Dec 2024) 101:1 (1 from 101) ONE logical memory qubit at distance-7, 0.143% error/cycle; no algorithm run on it Measured Nature 638, 920–926 (2024)
Quantinuum Helios (Nov 2025) 2:1 (48 from 98) Error-corrected qubits at a 99.99% state-prep-and-measurement benchmark; plus 94 error-detected at ≈1:1 Measured Quantinuum release, Nov 5, 2025
IBM gross code [[144,12,12]] 24:1 (12 in 288) Distance-12 quantum memory, on paper — 10× fewer qubits than surface code Paper Bravyi et al., Nature 627 (2024)
IBM Starling (2029) ≈100:1 (200 from ≈20,000) 200 logical qubits running 100M gates Roadmap IBM Quantum blog, Jun 10, 2025
IonQ (2030) 25–50:1 (40–80k from 2M) Logical error target below 10⁻¹² Roadmap IonQ blog, Jun 13, 2025
Gidney RSA-2048 estimate (2025) under 1M physical total, at 0.1% gate error Cryptography-grade run in under a week — 20× fewer qubits than the 2019 estimate Paper estimate arXiv:2505.15917
ONE FIELD, SIX RATIOS — SIX DIFFERENT TARGETS bar length = ratio, log scale · turquoise = measured · gold = paper or roadmap Helios 48 LQ (Nov 25) target: SPAM 99.99% 2:1 measured MSFT+Quantinuum (Sep 24) target: circuit error 22× under phys. ≈4.7:1 measured IBM gross code (2024) target: distance-12 memory, on paper 24:1 paper Google Willow (Dec 24) target: memory, 0.143%/cycle 101:1 measured IBM Starling (2029) target: 200 LQ × 100M gates ≈100:1 roadmap IonQ (2030) target: logical error <1e-12 25–50:1 comparing these bars directly is the mistake — each sits at a different target

Why is a ratio without its error target a number without units?

Because the ratio is not a constant of nature — it is a function of three inputs: the physical error rate, the code, and the target logical error rate. Push the target down (deeper algorithms, more gates) and the required distance grows, so the ratio grows with it. Every number in the table above sits at a different point on that curve.

Helios's 2:1 is real and measured — at a 99.99% state-preparation-and-measurement benchmark, which is roughly a 10⁻⁴-class target. Willow's 101:1 is real and measured — and buys a memory that still fails about once every ≈700 cycles (direct arithmetic on 0.143%), orders of magnitude short of what a 100-million-gate program needs. Neither is at algorithm grade; the cryptography-grade end of the curve is where Gidney's 2025 estimate lives, still needing on the order of a million physical qubits after two decades of algorithmic savings cut the 2019 figure by 20× (arXiv:2505.15917 vs arXiv:1905.09749).

The pattern will be familiar to readers of our vendor-metrics explainer: each architecture quotes the point on the curve where its physics shines. Trapped ions have the best fidelities, so small codes work and ratios look tiny; superconducting chips fabricate qubits by the hundred, so bigger codes at bigger ratios are the natural quote (the architecture trade-off is the same one, wearing a different metric). None of this is an accusation: every number above is honestly reported within its own declared benchmark. The incomparability appears downstream, when a headline compares a 2:1 against a 101:1 as if they were prices for the same product.

What would make the ratio actually convert roadmaps into dates?

The projected ratios need three things that are being measured right now. First, qLDPC codes require hardware the surface code doesn't: long-range couplers connecting distant qubits. IBM's experimental Loon chip, announced Nov 12, 2025, demonstrated those components ("c-couplers", multi-layer wiring, fast reset). Second, real-time decoding: IBM reported an FPGA decoder delivering results in ≈0.48 microseconds, a milestone it says landed a year ahead of schedule (PostQuantum, Nov 12, 2025). Third, qLDPC logic — computing on encoded qubits, not just storing them — where the evidence is younger: Photonic published a qLDPC code family (SHYPS) in Nature Communications on Aug 25, 2026, claiming logic with "meaningfully fewer" physical qubits than surface codes at the sizes tested, without hardware-scale numbers yet.

These are measured steps toward a projected ratio — worth tracking, and not yet the ratio itself. The scoreboard that decides the question stays where it was: useful end-to-end algorithms run on logical qubits, on any machine, at any ratio: zero (see what has proven advantage).

We have no measurements of our own in this class. Rosetta Q's sealed runs are small optimization and quantum-walk experiments on noiseless simulation or raw physical-qubit QPU jobs — we hold no logical-qubit data and claim none.

What we know / what we don't know

We know: below-threshold error suppression has been measured (Λ ≈ 2.14 per distance step, at distances up to 7 — Nature 638, 2024); 48 error-corrected logical qubits exist on one machine at 2:1 under its stated benchmark (Quantinuum, Nov 2025); a qLDPC code cuts memory overhead 10× on paper (Nature 627, 2024) and its hardware components have been demonstrated (Loon, Nov 2025).

We don't know: whether Λ holds at the distances and durations a real algorithm needs — 7 is the largest measured; what the 2:1 machines' logical error rates are under sustained deep computation, since the published figure is a state-prep-and-measurement fidelity; whether qLDPC logic keeps the 10× advantage at Starling scale — the gate constructions are younger than the memory result; what ratio any vendor will deliver at algorithm-grade targets, because no neutral body measures ratios under a common target; and whether the dates that depend on these ratios hold — no vendor fault-tolerance date has come due yet, so the track record is zero in both directions.

Rosetta Q publishes verdicts with reproducible raw data. This is educational content, not a product claim.

Sources:
· Google Quantum AI, "Quantum error correction below the surface code threshold", Nature 638, 920–926 (Dec 2024)
· Microsoft Azure Quantum blog — 12 logical qubits on Quantinuum H2 (Sep 10, 2024)
· Quantinuum — Helios commercial launch release (Nov 5, 2025)
· IBM Quantum blog — "IBM lays out clear path to fault-tolerant quantum computing" (Jun 10, 2025)
· Bravyi et al., "High-threshold and low-overhead fault-tolerant quantum memory", Nature 627 (2024)
· IonQ blog — "IonQ's Accelerated Roadmap" (Jun 13, 2025)
· Gidney, "How to factor 2048 bit RSA integers with less than a million noisy qubits" (arXiv:2505.15917, May 2025)
· PostQuantum — IBM Loon and Nighthawk analysis (Nov 12, 2025)
· Photonic — SHYPS qLDPC logic in Nature Communications (release, Aug 25, 2026)
· The Quantum Insider — Helios coverage (Nov 6, 2025)